Introduction
USB driver
MCA-2K Device
Overview
Module Constants
ARM Data structures
Version
Status
Controls
Calibration
Histogram
Two-channel Logger
Pulse capture
Lossless listmode
Perceptron-powered PSD
API
Overview
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MCA-2K Data Structure: arm_listmode
Summary
The MCA-2K devices (PMT-2000 and SiPM-2000) have a built-in dual-bank list mode capability. Each bank operates independently and has room for 511 events. While one memory bank is actively acquiring data, the other is stopped and can be read out by the client. This ensures loss-less list mode data acquisition up until the USB data bandwidth limit, of typically 125kcps.
The arm_listmode data structure contains the data acquired during a list mode run.
Listmode controls
All listmode controls are part of the arm_ctrl data structure
Listmode controls in arm_ctrl |
Register number and field name | Description |
AC39: lm_lsb | Listmode arrival times: 1LSB=2**x clock cycles. 0≤x≤15. At 24MHz FPGA clock speed, tthe highest list mode arrival time resolution is 43ns and the 20-bit time would roll over after 43.7ms; for x=0. At the other extreme, x=15, the resolution is 1.365ms and the roll over time is 1432s. |
AC12[16]: lm_buffer | 0 or 1. Select the active list mode buffer. |
AC13[7]: clear_listmode | Reset the listmode event counter to zero. Note that the other data entries in the list mode buffer are not set to zero. |
AC13[8]: clear_lmtime | Clear the FPGA wall clock used to measure event arrival times for list mode data acquisition. |
Run Mode and Run Action fields pertaining to list mode operation.
Data structure
For arm_listmode there are 512 'register' and a 1024 'field' data in use. All register data are 32-bit unsigned int32 (uint32).
arm_listmode registers and fields |
Register number and field name | Description |
LM0[0:11]: num_events | Number of events stored in the list mode buffer. |
LM0[12:15]: decimation | Indicates LSB of the arrival time: 1LSB = 2xcy, where 1cy 1/24MHz=41.7ns |
LM0[16:31]: reserved | Reserved, usually reporting 0. |
LM1 ... LM511: | Data buffer. It contains one 32-bit datum per event |
The arm_listmode registers; LMn means list mode register number n, with n=0...511. Bitfields are indicated as [b_low:b_high] indicating bit numbers b_low to b_high, inclusive.
The list mode data buffer (LM) consists of one 32-bit header word followed by 511 32-bit data words. Each data word consists of a 12-bit energy and a 20-bit time stamp. The value of the time stamp LSB in encoded in LM0[12:15]
List mode data fields |
Field name | Description |
num_events | Number of valid events in the buffer |
decimation | Indicates LSB of the arrival time: 1LSB = 2xcy, where 1cy=1/24MHz=41.7ns |
times | List of event arrival times measured in seconds |
energies | List of 12-bit energies; 1LSB = 1 MCA_bin |
The arm_listmode data fields
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