The fpga_ctrl data structure contains the data used to control the parameters of FPGA-based data acquisition.
For fpga_ctrl there are 16 'register' and a larger number of named 'field' data in use. All register data are 16-bit unsigned int16 (uint16).
fpga_ctrl registers and fields |
Register number and field name | Description |
CR0[0:15]: fine_gain | Component of the digital gain. Range is 0 to 65535. A value of 32768 corresponds to unity gain. |
CR1[0:9]: baseline_threshold | A trigger threshold for pulse height above baseline. Pulse heights below this value will be considered to be part of the DC baseline and are added to the DC-offset average. Unit is 0.978mV, 1023 →1.0V. |
CR1[10:15]: cr1_upper | Unused; set to zero |
CR2[0:9]: pulse_threshold | A signal trigger threshold for pulse height above baseline. Pulse heights above this value will be considered to be a signal and the FPGA will attempt to measure the pulse energy. The meaning of an LSB is the same as for baseline_threshold, above. |
CR2[10:15]: cr2_upper | Unused; set to zero |
CR3[0:15]: hold_off_time | Enforced minimum trigger dead time after a recognized pulse trigger. Unit: 1 ADC sampling clock cycle (ie 25ns for a 40MSPS system) |
CR4[0:15]: integration_time | Pulse summation time to measure pulse energy. Unit: 1 ADC sampling clock cycle (ie 25ns for a 40MSPS system) |
CR5[0:15]: roi_bounds | Region of interest bit-field: (A,B), B and A are 8-bit numbers. The region of interest is [16*A, 16*B] in mathematical notation. |
CR6[0:9]: trigger_delay | Number of pre-trigger ADC samples stored with a recorded scintillator pulse, called a trace |
CR6[10:15]: cr6_upper | Unused; set to zero |
CR7[0:15]: dac_data | 16-bit DAC data. CR7[0:11] hold the most significant 12 bit, and CR[11:15] hold the least significant 4 bits. In the 'fields' dict of the fpga_ctrl object, dac_data is a normal 16-bit unsigned integer. |
CR8[0:15]: run_time_0 | See below |
CR9[0:15]: run_time_1 | RT = run_time_0 + 65536*run_time_1 It is a requested runtime for histogram data acquisition. Unit is 65536/ADC_sampling_rate; eg 1.6384ms for a 40MHz device.The exact meaning depends on rtlt-value: 0 → ignored; DAQ continues indefinitely, 1 → limit is DAQ live time, 2 → limit is DAQ real time, 3 → DAQ stops at request number of accepted events |
CR10[0:15]: short_it | A summation interval shorter than integration_time. It is used together with list mode (lm_mode=1) or other on-the-fly pulse shape discrimination. Unit: 1 ADC sampling clock cycle (ie 25ns for a 40MSPS system) |
CR11[0:15]: put | Pileup parameter; Content depends on the value of nai_mode. 0 → pile up inspection is turned off. |
CR12[0:3]: ecomp | Coarse-gain part of digital gain; each unit divides the energy by 2 before binning in the energy histogram. Digital_Gain = fine_gain / 2ecomp * 40MHz/ADC_SR |
CR12[4:7]: pcomp | Coarse-gain for PID-entries in list-mode; |
CR12[8:11]: gain_select | Select transimpedance (Z, gain) of input amplifier; 0 →100Ω, 1 →430Ω, 2 →1100Ω, 4 →3400Ω, 8 →10100Ω V_out = Z*I_SiPM; ADC has 1V input range. |
CR12[12:15]: cr12_upper | Unused; Set to zero |
CR13[0]: sel_led | Usage varies; Often used to select LED-caused pulses for histogramming and trace acquisition. |
CR13[1]: gain_stab | Usage varies; In non-standard firmware it is used to activated FPGA-based gain stabilization. |
CR13[2]: suspend | Halt all operation and statistics counters; essentially, stop time. |
CR13[3]: segment | Select a memory segment (0 or 1); used only when segment_enable is 1. |
CR13[4]: segment_enable | Enable splitting the histogram memory into two banks, each with its own time and event counters. |
CR13[5]: daq_mode | 0 → Statistics counters continue after histogram DAQ has stopped; 1 → They stop when DAQ stops; |
CR13[6]: nai_mode | Select a method of pile up rejection; 0 → Good for all scintillators (especially slow ones); 1 → Optimized for fast scintillators (τ < 1μs). Affects choice of PUT value. |
CR13[7]: temperature_disable | Usage varies. In standard firmware: 0 → normal operation; 1 → Temperature measurements are disabled. Most often used to introduced FPGA-based temperature averaging. |
CR14[0:4]: opto_repeat_time | T encodes the pulser period; For an ADC sampling rate SR, the pulser period (P) and frequency (f) are P = 2T+2/SR, f = SR/2T+2. |
CR14[5:8]: opto_pulse_width | W encodes the pulse width PW:
PW = 2W+1/SR; Set T=W for a 50% duty cycle square wave. |
CR14[9:12]: opto_pulse_sep | S encodes double pulse separation PS:
PS = 2S+1/SR. |
CR14[13]: cr14_b13 | Unused; Set to 0 |
CR14[14]: opto_trigger | 1 → Allow LED pulser to trigger event acquisition; |
CR14[15]: opto_enable | 1/0 → Enable/Disable LED pulser. |
CR15[0]: clear_statistics | Reset time and event counters; self-clearing bit. |
CR15[1]: clear_histogram | Erase histogram; self-clearing bit. This operation requires 4096 ADC sampling clock cycles to complete. |
CR15[2]: clear_list_mode | Unlock list mode module; self-clearing bit. |
CR15[3]: clear_trace | Unlock trace module; self-clearing bit. |
CR15[4]: ut_run | Start untriggered trace acquisition; self-clearing bit. |
CR15[5]: program_hv | Reprogram the HV-DAC; self-clearing bit. |
CR15[6]: read_nv | Read non-volatile memory into USER memory; self-clearing bit. |
CR15[7]: write_nv | Write non-volatile memory from USER memory; self-clearing bit. |
CR15[8]: ha_run | 0 → Histogram energies; 1 → Histogram pulse-heights |
CR15[9]: trace_run | 1 → Acquire a triggered trace (requires run = 1) |
CR15[10]: vt_run | 1 → Acquire a validated trace (requires run = 1) |
CR15[11]: lm_run | 1 → Acquire a list mode buffer (requires run = 1) |
CR15[13:14]: rtlt | Governs histogram acquisition0 → Indefinite DAQ;
1 → Live time extension;
2 → Stops when request = real_time;
3 → Stops on 'request' histogram counts reached |
CR15[15]: run | 1 → allow DAQ; 0 → Stops all DAQ |
The fpga_ctrl registers; CRn means control register number n, with n=0...15 . Bitfields are indicated as [b_low:b_high] indicating bit numbers b_low to b_high, inclusive.
The user dictionary is used to convert some fpga_ctrl registers in to physical quantities, mostly amplitudes(V) and times(s).